2000 IEEE Nuclear Science Symposium. Conference Record (Cat. No.00CH37149) · 2002 · 43 citations · 6 references
EngineeringComputer EngineeringElectrical EngineeringFault ToleranceFault-tolerant ComputingMicroelectronicsAccelerator PhysicsCmos Circuit DesignCommunication LinksDetector TechnologyHardware Fault ToleranceInterconnect ArchitectureDetectorsGigabit EthernetRadiation Data Acquisition SystemsRadiation-hardened Integrated CircuitsRadiation-tolerant ElectronicsTotal DoseTransceiver ArchitecturesTransceiver Design
Gbit/s data transmission links will be used in several LHC detectors in trigger and data acquisition systems. In these experiments, the transmitters will be subject to high radiation doses over the lifetime of the experiments. In this work, a radiation tolerant transmitter ASIC is described. The IC supports two standard protocols, the G-link and the Gbit-Ethernet, and sustains transmission of data at both 800 Mbit/s and 1.6 Gbit/s. The ASIC was implemented in a mainstream 0.25 /spl mu/m CMOS technology employing radiation tolerant layout practices. A 1.2 Gbit/s prototype with reduced functionality was tested. The ASIC behavior under total dose irradiation as well as its susceptibility to single event upsets was studied and the results are reported here.
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Computational method to estimate Single Event Upset rates in an accelerator environment
M. Huhtinen, F. Faccio · Nuclear Instruments and Methods in Physics Research Section A Accelerators Spectrometers Detectors and Associated Equipment · 2000 · 132 citations
Engineering, Computer Engineering, Electrical Engineering +13
Deep submicron CMOS technologies for the LHC experiments
P. Jarron, G. Anelli, T. Calin et al. · Nuclear Physics B - Proceedings Supplements · 1999 · 65 citations