Thomas Toifl - Concepedia

Author

Thomas Toifl

IBM Research - Zurich ORCID

Also Known As

Han Then, Menouni, M, T. Toifl, T.H. Toifl, Thomas Toifl, Toifl, Thomas

130

Publications

3.4K

Citations

H-Index

Concepts

All Affiliations

IBM Research - Zurich IBM (United States)École Polytechnique Fédérale de Lausanne ETH Zurich IBM Research - Thomas J. Watson Research Center

About

Thomas Toifl is an author at IBM Research - Zurich specializing in engineering, computer engineering, and microelectronics.

Top Concepts

#	Concept	H-Index	Publications	Citations
1	Engineering	29	53	2.5K
2	Computer Engineering	29	51	2.6K
3	Applied Physics	3	3	124
4	Natural Sciences	1	1	36
5	Computer Science	1	1	18

Thomas Toifl

Publications

3.1K

Citations

H-Index

Page 1

	Year	Citations
A 3.1 mW 8b 1.2 GS/s Single-Channel Asynchronous SAR ADC With Alternate Comparators for Enhanced Speed in 32 nm Digital SOI CMOS Lukas Kull, Thomas Toifl, Martin Schmatz, IEEE Journal of Solid-State Circuits Enhanced SpeedReference CapacitorEngineeringCalibrationData Converter	2013	324
A 28-Gb/s 4-Tap FFE/15-Tap DFE Serial Link Transceiver in 32-nm SOI CMOS Technology John F. Bulzacchelli, Christian Menolfi, T. Beukema, IEEE Journal of Solid-State Circuits Electrical EngineeringEngineeringVlsi DesignMixed-signal Integrated Circuit28-Gb/s Transceiver	2012	174
A T-Coil-Enhanced 8.5 Gb/s High-Swing SST Transmitter in 65 nm Bulk CMOS With $≪ -$16 dB Return Loss Over 10 GHz Bandwidth Marcel Kossel, Christian Menolfi, P. Buchmann, IEEE Journal of Solid-State Circuits Low-power ElectronicsElectrical EngineeringEngineeringRf SemiconductorRadio Frequency	2008	133
22.1 A 90GS/s 8b 667mW 64&#x00D7; interleaved SAR ADC in 32nm digital SOI CMOS Lukas Kull, Thomas Toifl, Martin Schmatz, Sar AdcSystem On ChipEngineeringData ConverterOptical Communication Standards	2014	120
4.7 A sub-ns response on-chip switched-capacitor DC-DC voltage regulator delivering 3.7W/mm<sup>2</sup> at 90% efficiency using deep-trench capacitors in 32nm SOI CMOS Toke Meyer Andersen, Florian Krismer, Johann W. Kolar,	2014	97
28.5 A 10b 1.5GS/s pipelined-SAR ADC with background second-stage common-mode regulation and offset calibration in 14nm CMOS FinFET Lukas Kull, Danny Luu, Christian Menolfi, Conversion SpeedPipelined-sar AdcData ConverterMixed-signal Integrated CircuitAnalog Design	2017	94
A 64-Gb/s 1.4-pJ/b NRZ Optical Receiver Data-Path in 14-nm CMOS FinFET İlter Özkaya, Alessandro Cevrero, Pier Andrea Francese, IEEE Journal of Solid-State Circuits EngineeringOptical Transmission SystemIntegrated CircuitsOptical AmplifierOptical Properties	2017	86
A 22-Gb/s PAM-4 Receiver in 90-nm CMOS SOI Technology Thomas Toifl, Christian Menolfi, Michael Ruegg, IEEE Journal of Solid-State Circuits	2006	83
A 24–72-GS/s 8-b Time-Interleaved SAR ADC With 2.0–3.3-pJ/Conversion and >30 dB SNDR at Nyquist in 14-nm CMOS FinFET Lukas Kull, Danny Luu, Christian Menolfi, IEEE Journal of Solid-State Circuits Differential Capacitive Dac14-Nm Cmos FinfetData ConverterMixed-signal Integrated CircuitAnalog Design	2018	83
A 3.1mW 8b 1.2GS/s single-channel asynchronous SAR ADC with alternate comparators for enhanced speed in 32nm digital SOI CMOS Lukas Kull, Thomas Toifl, Martin Schmatz, Energy-efficient AdcsEnhanced SpeedEngineeringMinimum AreaData Converter	2013	82

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