Hybrid Circuits · 1990 · 22 citations · 3 references
EngineeringComputer ArchitecturePackage Performance BottleneckSingle ChipMultichip Module DesignsAdvanced Packaging (Semiconductors)High-performance ArchitectureComputer DesignSystems EngineeringElectronic PackagingParallel ComputingArray ProcessorChip On BoardComputer EngineeringChip AttachmentMicroelectronicsSystem On ChipChip-scale PackageMany-core Architecture
A package performance bottleneck is developing because of the inability to densely wire single chip modules together on the printed wiring board. An array processor, constructed by means of various high performance packaging techniques, demonstrates that multichip modules of even modest size can give dramatic improvements in the packaging figure of merit.
3
A wafer with electrically programmable interconnections
H. Stopper · 1985 · 19 citations
Electrical Engineering, Wafer Scale Processing, Engineering +12