Multichip Module Designs for High Performance Applications

C. A. Neugebauer, R. O. Carlson, R.A. Fillion, T. R. Haller

Hybrid Circuits · 1990 · 22 citations · 3 references

Concepts

Abstract

A package performance bottleneck is developing because of the inability to densely wire single chip modules together on the printed wiring board. An array processor, constructed by means of various high performance packaging techniques, demonstrates that multichip modules of even modest size can give dramatic improvements in the packaging figure of merit.

References

3