IEEE Journal of Solid-State Circuits · 1978 · 16 citations · 16 references
EngineeringElectrical EngineeringMaterials ScienceElectronic MaterialsSemiconductor DevicesSemiconductor MaterialsDopingIon ImplantationP-n JunctionsSemiconductor Device MaterialsSemiconductor InterfacesSemiconductor PhysicsAnnealingBreakdown VoltageJunction FabricationJunction Leakage CurrentLeakage CurrentP-n Junction CharacteristicsPost-implantation AnnealingReverse Bias Characteristics
The fabrication and characteristics of planar junctions in GaAs formed by Be ion implantation are discussed. The critical processing step is shown to be the use of a carefully deposited oxygen-free Si/SUB 3/N/SUB 4/ encapsulation during post-implantation annealing. Forward and reverse characteristics are presented for Be-implanted junctions formed by encapsulating with SiO/SUB 2/, Si/SUB x/O/SUB y/N/SUB z/, or Si/SUB 3/N/SUB 4/ layers prior to annealing at 900/spl deg/C. Junctions which exhibit leakage current density of ~2/spl times/10/SUP -7/ A/cm/SUP 2/ at 80 V reverse bias and breakdown voltage >200 V have been fabricated using RF-plasma deposited Si/SUB 3/N/SUB 4/ layers as the encapsulant.
16
Study of Encapsulants for Annealing GaAs
K. V. Vaidyanathan, M.J. Helix, D. J. Wolford et al. · Journal of The Electrochemical Society · 1977 · 84 citations