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An analytical drain current model considering both electron and lattice temperatures simultaneously for deep submicron ultrathin SOI NMOS devices with self-heating
63
Citations
20
References
1995
Year
Device ModelingSemiconductorsElectrical EngineeringLattice TemperatureEngineeringSemiconductor TechnologyNanoelectronicsBias Temperature InstabilityApplied PhysicsQuantum MaterialsLattice TemperaturesMicroelectronicsClosed-form Analytical ModelSemiconductor Device
This paper reports a closed-form analytical drain current model considering both electron and lattice temperatures simultaneously using a quasi-two-dimensional approach for deep submicron ultrathin SOI NMOS devices. As verified by the experimental data, the closed-form analytical model shows a good predication of the negative differential resistance behavior. Based on the analytical model, with a channel length of <0.2 /spl mu/m, both the effective electron temperature and the lattice temperature are important in determining the negative differential resistance.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">></ETX>
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