IEEE Electron Device Letters · 2008 · 21 citations · 10 references
EngineeringComputer EngineeringElectrical EngineeringElectronic MaterialsMicroelectronicsSemiconductor DevicesCmos Circuit DesignIntegrated Circuit DesignNanoelectronicsBand BendingFin Field-effect TransistorsFlash MemoryFlash Memory DevicesNand Flash MemorySchottky Barrier CharacteristicsSchottky Barrier DiodesThreshold Voltage
A dopant-segregated (DS) Schottky-barrier (DSSB) FinFET SONOS for NAND flash memory with a proposed architecture is demonstrated for the first time. A DSSB technique with a nickel-silicided source/drain (S/D) is integrated in the FinFET with a 30-50-nm range of fin width. Compared with the conventional FinFET SONOS, the DSSB FinFET SONOS boasts very fast programming time with low voltage. For a programming state, hot electrons triggered by sharp band bending at the DS S/D region are used. As a result, a threshold voltage ( <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">V</i> <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">th</sub> ) shift of 4.5 V is achieved in a fast programming time of 100 ns.
10
Technology for sub-50nm DRAM and NAND flash manufacturing
Kinam Kim · 2006 · 170 citations
Engineering, Computer Engineering, Electrical Engineering +17
High-Performance FinFET with Dopant-Segregated Schottky Source/Drain
A. Kaneko, A. Yagishita, K. Yahashi et al. · 2006 · 53 citations
Engineering, Electrical Engineering, Electronic Materials +11