Concepedia

Design Strategy Of Mlscr Devices For Sub-micron Cmos Technology

Tong Lu, J.C. Guo, T. Wang, F. Shone

2005 · 10 citations · 6 references

Concepts

EngineeringComputer EngineeringElectrical EngineeringElectronic MaterialsMicroelectronicsSemiconductor DevicesCmos Circuit DesignDevice ModelingDevice ScalingIntegrated Circuit DesignPhysical DesignSubthreshold Circuit DesignCmos Digital Circuit DesignCmos Fabrication ProcessesCmos ScalingDevice OptimizationScaling Effects In CmosSubthreshold Cmos Design

References

6

A low-voltage triggering SCR for on-chip ESD protection at output and input pads

Amitava Chatterjee, T. Polgreen · IEEE Electron Device Letters · 1991 · 243 citations

Engineering, Electrical Engineering, Microelectronics +13

A synthesis of ESD input protection scheme

Charvaka Duvvury, R.N. Rountree · Journal of Electrostatics · 1992 · 66 citations

Engineering, Electrical Engineering, Critical Infrastructure Protection +5

Electrothermal behavior of deep submicron nMOS transistors under high current snapback (ESD/EOS) conditions

A. Amerasekera, J.A. Seitchik · 2002 · 52 citations

Engineering, Electrical Engineering, Heat Transfer +14

A survey of second breakdown

Harry A. Schafft, J.C. French · IEEE Transactions on Electron Devices · 1966 · 42 citations

Engineering, Electrical Engineering, Electronic Materials +15

ESD protection in a 3.3 V sub-micron silicided CMOS technology

D.B. Krakauer · Journal of Electrostatics · 1993 · 34 citations

Engineering, Electrical Engineering, Electronic Materials +11