IEEE Transactions on Nuclear Science · 2008 · 38 citations · 7 references
EngineeringComputer EngineeringElectrical EngineeringComputer ArchitectureFault-tolerant ComputingField-programmable Gate ArraysConfigurable Logic BlocksField-programmable Gate Array ArchitectureFpga ArchitectureTiming AnalysisTiming ModelingField-programmable Gate Arrays (Fpgas)Flash-based Configuration MemoryHardware Fault InjectionNon-volatile MemoryNon-volatile Memory DesignRouting In Field-programmable Gate Arrays
New insights on SET propagation in flash-based FPGAs are investigated, with regards to their technology and unique non-volatile architecture. By means of SET fault injection tests, the broadening and the filtering of SET pulse widths were demonstrated and are related to the SET pulse transition and data-path in the studied FPGA design. These basic mechanisms result in a clear dependence of the SET pulse width on the design's configuration and routing that would favor spontaneous SET filtering in most real life designs.
7
V. Ferlet-Cavrois, Philippe Paillet, Dale McMorrow et al. · IEEE Transactions on Nuclear Science · 2007 · 152 citations