IEEE Transactions on Nuclear Science · 2001 · 186 citations · 32 references
EngineeringComputer EngineeringElectrical EngineeringMicroelectronicsRadiation PhysicsSemiconductor DevicesCmos Circuit DesignDevice ModelingDevice ReliabilityDevice SimulationIntegrated Circuit DesignPhysical DesignCharge CollectionFirst-principles ModelingFocused Ion Beam Scanning Electron MicroscopyMicroscopyRadiation EffectsRadiation-hardened Memory DevicesSingle Event EffectsSingle Event Upset Modeling
Large-scale three-dimensional (3D) device simulations, focused ion microscopy, and broadbeam heavy-ion experiments are used to determine and compare the SEU-sensitive volumes of bulk-Si and SOI CMOS SRAMs. Single-event upset maps and cross-section curves calculated directly from 3D simulations show excellent agreement with broadbeam cross section curves and microbeam, charge collection and upset images for 16 K bulk-Si SRAMs. Charge-collection and single-event upset (SEU) experiments on 64 K and 1 M SOI SRAMs indicate that drain strikes can cause single-event upsets in SOI ICs. 3D simulations do not predict this result, which appears to be due to anomalous charge collection from the substrate through the buried oxide. This substrate charge-collection mechanism can considerably increase the SEU-sensitive volume of SOI SRAMs, and must be included in single-event models if they are to provide accurate predictions of SOI device response in radiation environments.
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Impact of technology trends on SEU in CMOS SRAMs
P.E. Dodd, F.W. Sexton, G.L. Hash et al. · IEEE Transactions on Nuclear Science · 1996 · 126 citations
Engineering, Computer Engineering, Electrical Engineering +17