Scaling of BTI reliability in presence of time-zero variability

Abstract

In this paper, we first outline the impact of Bias Temperature Instability (BTI) on the transistor threshold voltage as a function of time and the gate oxide field. Subsequently, the correlation between time-zero and time-dependent variability is described. A combined distribution encompassing both contributions with their relative weights is derived. Finally, circuit-level insights on the BTI impact are given based on case study simulations of Ring Oscillators (ROs) at commercial-grade 28nm planar and research-grade 14, 10, 7nm FinFET technology nodes for several FET channel materials (e.g. Si, SiGe, Ge, InGaAs).