Applied Physics Letters · 1993 · 26 citations · 10 references
EngineeringElectrical EngineeringMaterials ScienceMicroelectronicsSemiconductor MaterialsThin FilmsChemical Vapor DepositionDevice ReliabilityDielectricsMos CapacitorsSemiconductor InterfacesSemiconductor ReliabilityAnode EffectsGate Dielectric EngineeringGate DielectricsGate Oxide InterfacesGate Oxide ReliabilityInterface GenerationInterface State KineticsPolycrystalline Silicon
This letter discusses the reliability characteristics of metal-oxide-semiconductor capacitors with chemical-vapor-deposited Ta2O5 gate dielectric films. To be compatible with the conventional polycrystalline Si-gate process, SiO2 or Si3N4 film was deposited on Ta2O5 as the top dielectric layer. It is found that under high-field stress, interface state generation is enhanced with the presence of the top dielectric layers, probably due to the anode-field increase caused by the positive-charge buildup in the stacked dielectrics capacitors. The significant positive-charge build-up in capacitors with top dielectrics is believed to be due to the hole-injection-barrier from Ta2O5 to SiO2 or Si3N4 and/or damage creation in the Ta2O5 films.
10
An experimental 1.5-V 64-Mb DRAM
Y. Nakagome, Hiroki Tanaka, Kazuhiro Takeuchi et al. · IEEE Journal of Solid-State Circuits · 1991 · 182 citations
Engineering, Computer Engineering, Electrical Engineering +17