Applied Physics Letters · 2006 · 34 citations · 10 references
EngineeringElectrical EngineeringMaterials ScienceElectronic MaterialsSemiconductor DevicesSemiconductor MaterialsDefects In Electronic MaterialsDevice CharacterizationSemiconductor Crystal GrowthSemiconductor DefectsSemiconductor Device MaterialsSemiconductor InterfacesDeep-level DefectsDeep-level ImpuritiesEpitaxial MaterialsSiliconSilicon CarbideTransient Current SpectroscopyTrap CharacterizationTraps
Changing the ratio of carbon to silicon during the epitaxial 4H–SiC growth is expected to alter the dominant deep level trap, which has been attributed to a native defect. The C∕Si ratio was changed from one to six during epitaxial growth of SiC. Diodes fabricated on the epitaxial layer were then characterized using current-voltage and deep level transient spectroscopy. The single peak at 340K (Z1/Z2 peak), was deconvolved into two traps, closely spaced in energy. The concentration of one of the Z1/Z2 traps decreased with increasing C∕Si ratio. This result opposes theoretical predictions of carbon interstitial components, and supports assignment to a silicon antisite or carbon vacancy relationship. The concentration of the second component of the peak at 340K did not depend on the C∕Si ratio, which would indicate an impurity in an interstitial site.
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Numerical recipes in C: the art of scientific computing
Choice Reviews Online · 1993 · 18.1K citations · Full text
Transient capacitance measurements on resistive samples
A. Broniatowski, A. Blosse, Pankaj Srivastava et al. · Journal of Applied Physics · 1983 · 107 citations