Laterally asymmetric channel engineering in fully depleted double gate SOI MOSFETs for high performance analog applications

Device scaling limits of Si MOSFETs and their application dependencies

D.J. Frank, R.H. Dennard, E. Nowak et al. · Proceedings of the IEEE · 2001 · 1.6K citations

Engineering, Computer Engineering, Electrical Engineering +17

A g/sub m//I/sub D/ based methodology for the design of CMOS analog circuits and its application to the synthesis of a silicon-on-insulator micropower OTA

Fernando Silveira, Denis Flandre, P.G.A. Jespers · IEEE Journal of Solid-State Circuits · 1996 · 650 citations

Engineering, Electrical Engineering, Analog Electronics +15

Scaling theory for double-gate SOI MOSFET's

Ken Suzuki, Tetsu Tanaka, Y. Tosaka et al. · IEEE Transactions on Electron Devices · 1993 · 556 citations · Full text

Engineering, Electrical Engineering, Electronic Materials +16

Series-parallel association of FET's for high gain and high frequency applications

Carlos Galup‐Montoro, M.C. Schneider, I.J.B. Loss · IEEE Journal of Solid-State Circuits · 1994 · 239 citations

Engineering, Electrical Engineering, Analog Electronics +12

A physical and scalable I-V model in BSIM3v3 for analog/digital circuit simulation

Yuhua Cheng, Min-Chie Jeng, Zhihong Liu et al. · IEEE Transactions on Electron Devices · 1997 · 179 citations

Engineering, Computer Engineering, Electrical Engineering +17