A low-overhead scheme for testing a bit-level finite ring systolic array

Why systolic architectures?

Kung · Computer · 1982 · 2.3K citations

Computer architecture and parallel processing

Yigal Hoffner · Microprocessors and Microsystems · 1985 · 1.2K citations

Computing, Computer Engineering, Computer Science +14

On the design of algorithms for VLSI systolic arrays

Dan Moldovan · Proceedings of the IEEE · 1983 · 392 citations

Engineering, Computer Engineering, Computer Science +12

Enhancing Testability of Large-Scale Integrated Circuits via Test Points and Additional Logic

Monika Williams, James B. Angell · IEEE Transactions on Computers · 1973 · 303 citations

Engineering, Computer Engineering, Electrical Engineering +13

Easily Testable Iterative Systems

Arthur Friedman · IEEE Transactions on Computers · 1973 · 253 citations

Engineering, Computer Engineering, Computer Science +9