Systolic Array Design

Systolic Array Design is a computational architecture paradigm in digital signal processing characterized by a synchronized, grid-like arrangement of processing elements that rhythmically compute and pass data through the system to enable high-throughput, parallelized operations.

1.2K

Publications

45.3K

Citations

2.2K

Authors

631

Institutions

Publications per year

2017–2026

171

Authors

2.2K

  1. HT
    H. T. Kung

    Carnegie Mellon University, United States

    24 publications · 1.7K citations

    18

    h-index

  2. PK
    Pramod Kumar Meher

    Nanyang Technological University, Singapore

    24 publications · 724 citations

    15

    h-index

  3. JM
    J.G. McWhirter

    Cardiff University, United Kingdom

    18 publications · 764 citations

    14

    h-index

  4. JM
    J.V. McCanny

    Queen's University Belfast, United Kingdom

    21 publications · 486 citations

    14

    h-index

  5. SK
    Sun‐Yuan Kung

    Princeton University, United States

    15 publications · 1.1K citations

    14

    h-index

1–5 of 2.2K

Venues

  1. IEEE Transactions on Computers

    62 publications · 4.6K citations

    38

    h-index

  2. IEEE Transactions on Signal Processing

    36 publications · 1.4K citations

    24

    h-index

  3. 19

    h-index

  4. 19

    h-index

  5. 19

    h-index

1–5