Nanotechnology · 2008 · 14 citations · 18 references
EngineeringMaterials EngineeringMaterials ScienceElectronic MaterialsSemiconductor MaterialsThin FilmsMemory DevicesMemristive MaterialsNanoelectronicsSemiconductor Device MaterialsSemiconductor NanomaterialsSemiconductor Thin FilmsCapacitance-voltage CharacteristicsCapacitance-voltage RelationsHigh-resolution Electron MicroscopyHigh-resolution Transmission Electron MicroscopyHysteresis In Capacitance-voltage CurvesMemory MaterialsNonvolatile Memory DevicesNonvolatile Memory Materials
1-5 period multilayers of Ge nanodots (NDs) for nonvolatile memories have been self-assembled by ion beam sputtering deposition of an ultra-small amount of Ge between SiO(2) layers at room temperature without post-annealing. High-resolution transmission electron microscopy demonstrates the existence of Ge ND layers well defined with respect to the SiO(2)/Si interface. The memory window that is estimated by capacitance-voltage hysteresis is proportional to the period, and finally reaches a plateau of about 11 V asymptotically over three periods. The program speed is enhanced over the full pulse-time range by increasing bias voltage or period. The charge-loss speed in the programmed state is slower in the samples with larger period. These memory properties are discussed based on possible physical mechanisms.
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NROM: A novel localized trapping, 2-bit nonvolatile memory cell
B. Eitan, Paolo Pavan, I. Bloom et al. · IEEE Electron Device Letters · 2000 · 547 citations · Full text
Engineering, Computer Engineering, Electrical Engineering +12
Multilevel charge storage in silicon nanocrystal multilayers
Tiezheng Lu, Marin Alexe, R. Scholz et al. · Applied Physics Letters · 2005 · 144 citations
Jianhui Chen, Y.Q. Wang, Won Jong Yoo et al. · IEEE Transactions on Electron Devices · 2004 · 101 citations