High performance low-temperature poly-Si n-channel TFTs for LCD

A. Mimura, N. Konishi, Kyosuke Ono, J.-I. Ohwada, Y. Hosokawa, Yūichi Ono, Takaya Suzuki, Kenji Miyata, Hideaki Kawakami

IEEE Transactions on Electron Devices · 1989 · 174 citations · 23 references

Concepts

Abstract

High-performance poly-Si TFTs were fabricated by a low-temperature 600 degrees C process utilizing hard glass substrates. To achieve low threshold voltage (V/sub TH/) and high field-effect mobility ( mu /sub FE/), the conditions for low-pressure chemical vapor deposition of the active layer poly-Si were optimized. Effective hydrogenation was studied using a multigate (maximum ten divisions) and thin-poly-Si-gate TFTs. The crystallinity of poly-Si after thermal annealing at 600 degrees C depended strongly on the poly-Si deposition temperature and was maximum at 550-560 degrees C. The V/sub TH/ and mu /sub FE/ showed a minimum and a maximum, respectively, at that poly-Si deposition temperature. The TFTs with poly-Si deposited at 500 degrees C and a 1000-AA gate had a V/sub TH/ of 6.2 V and mu /sub FE/ of 37 cm/sup 2//V-s. The high-speed operation of an enhancement-enhancement type ring oscillator showed its applicability to logic circuits. The TFTs were successfully applied to 3.3-in.-diagonal LCDs with integration of scan and data drive circuits.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

References

23