A Defect Control Technique for the Intrinsic Gettering in Silicon Device Processing

Abstract

A short period low-temperature-annealing procedure is proposed for the two step annealing process to make effective intrinsic gettering in silicon device processing. A continuous raising of annealing temperature at a constant rate during the low temperature annealing step increases the density of bulk microdefects which are able to grow further in the subsequent high temperature device processing step. The temperature raising rate is limited so that the expanding speed of the critical size of microdefects at the annealing temperature is lower than the growth rate of microdefects. The optimum defect density is discussed from the standpoint of wafer warpage and gettering ability.