An Advanced PSA Technology for High-Speed Bipolar LSI

H. Nakashiba, I. Ishida, K. Aomura, Toshio Nakamura

IEEE Journal of Solid-State Circuits · 1980 · 18 citations · 5 references

Concepts

Abstract

An advanced method for polysilicon self-aligned (PSA) bipolar LSI technology has realized a miniaturized transistor for high performance. By introducing the overlapping structure for double poly-silicon electrodes, the emitter area is reduced to 1/spl mu/m X 3 /spl mu/m and the base junction is reduced to 0.3 /spl mu/m. The CML integrated circuit composed of this transistor has achieved a minimum propagation delay time of 0.29 ns/gate with power dissipation of 1.48 mW/gate. Compared to the conventional PSA method, this technology promises to fabricate higher speed and higher density LSI's.

References

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