Surface mobility in n/sup +/ and p/sup +/ doped polysilicon gate PMOS transistors

Abstract

The effective surface mobility and its degradation due to a transverse electric field are reported for three different PMOS designs-N/sup +/-doped gate with a classical n-well, n/sup +/-doped gate with a retrograde n-well, and p/sup +/-doped gate with a classical n-well. The data fitted well to a semiempirical expression derived from a combined classical and quantum mechanical treatment. The mobility behavior was found to be dependent only on the surface electric field at threshold for the three PMOS designs. For devices having the same threshold voltage, the n/sup +/-gate, classical n-well devices had the highest mobility. The mobility was reduced by 5% for retrograde devices, and by 25% for p/sup +/ gate devices.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>