2006 · 45 citations · 10 references
EngineeringComputer EngineeringComputer ScienceComputer ArchitectureField-programmable Gate ArraysMicroelectronicsField-programmable Gate Array ArchitectureInstruction Set ArchitectureMemory Subsystem DesignLogic BistMarch Test AlgorithmsMemory Circuit DesignMemory CircuitsMemory March Testing
A full-speed field-programmable memory BIST controller is proposed. The proposed instruction and architecture designs enable full-speed operation of not only March algorithms but also some non-linear algorithms that are becoming more and more important in modern memory testing, diagnosis, and failure analysis.
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A programmable BIST core for embedded DRAM
Chih-Tsun Huang, Jing-Reng Huang, Chi-Feng Wu et al. · IEEE Design & Test of Computers · 1999 · 125 citations