H.Y. Li

Development of through silicon via (TSV) interposer technology for large die (21×21mm) fine-pitch Cu/low-k FCBGA package

Xiaowu Zhang, T.C. Chai, John H. Lau et al. · 2009 · 109 citations

Engineering, Computer Architecture, Large Die +17

Development of Wafer-Level Warpage and Stress Modeling Methodology and Its Application in Process Optimization for TSV Wafers

Fa Xing, H.Y. Li, Xiaowu Zhang et al. · IEEE Transactions on Components Packaging and Manufacturing Technology · 2012 · 70 citations

Engineering, Mechanical Engineering, Wafer Stress +21

Modelling and characterization on wafer to wafer hybrid bonding technology for 3D IC packaging

Lin Ji, Hongmiao Ji, H.Y. Li et al. · 2019 · 42 citations

Engineering, Mechanical Engineering, Interconnect (Integrated Circuits) +21

A small OCA on a 1/spl times/0.5-mm/sup 2/ 2.45-GHz RFID Tag-design and integration based on a CMOS-compatible manufacturing technology

A.P. Popov, H.Y. Li, Yu-Hsing Wang et al. · IEEE Electron Device Letters · 2006 · 24 citations

Cmos-compatible Manufacturing Technology, Engineering, Radio Frequency +16

Bendability of single-crystal Si MOSFETs investigated on flexible substrate

H.Y. Li, W.Y. Loh, L. K. Bera et al. · IEEE Electron Device Letters · 2006 · 23 citations

Engineering, Mechanical Engineering, Silicon On Insulator +16