Concepedia

P. Nayak

PN

Statistics

Publications

5

Citations

201

H-Index

5

Active since

2011

Affiliations

Intel (United States)(Current)

P. Nayak is an author at Intel (United States) specializing in engineering, microelectronics, and electrical engineering.

Publications per year

2011–2020

5

Publications

5

Reliability studies of a 10nm high-performance and low-power CMOS technology featuring 3rd generation FinFET and 5th generation HK/MG

Anisur Rahman, Javier Dacuña, P. Nayak et al. · 2018 · 79 citations

Engineering, Computer Engineering, Electrical Engineering +17

Transistor aging and reliability in 14nm tri-gate technology

S. Novak, C. Parker, D. Becher et al. · 2015 · 65 citations

Engineering, Electrical Engineering, Electronic Materials +16

Transistor reliability variation correlation to threshold voltage

S. Ramey, Manisha Chahal, P. Nayak et al. · 2015 · 32 citations

Engineering, Electrical Engineering, Microelectronics +14

A Reliability Overview of Intel’s 10+ Logic Technology

R. Grover, Tony Acosta, C. AnDyke et al. · 2020 · 14 citations

Engineering, Computer Engineering, Electrical Engineering +17

Unusual $C$– $V$ Characteristics of High-Resistivity SOI Wafers

P. Nayak, M. Seacrist, D.K. Schroder · IEEE Electron Device Letters · 2011 · 11 citations

Engineering, Electrical Engineering, Materials Science +17

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