Wei-Yip Loh

Si tunnel transistors with a novel silicided source and 46mV/dec swing

Kanghoon Jeon, Wei-Yip Loh, Pratik Patel et al. · 2010 · 204 citations

Semiconductors, Semiconductor Technology, Electrical Engineering +13

Electrical and Interfacial Characterization of Atomic Layer Deposited High- $\kappa$ Gate Dielectrics on GaAs for Advanced CMOS Devices

Goutam Kumar Dalapati, Yi Tong, Wei-Yip Loh et al. · IEEE Transactions on Electron Devices · 2007 · 137 citations

Semiconductors, Materials Science, Electrical Engineering +15

Contact Resistance Reduction to FinFET Source/Drain Using Novel Dielectric Dipole Schottky Barrier Height Modulation Method

Brian E. Coss, Casey Smith, Wei-Yip Loh et al. · IEEE Electron Device Letters · 2011 · 28 citations

Electrical Engineering, Contact Resistance Reduction, Engineering +10

Demonstration of $L_{g} \sim \hbox{55}\ \hbox{nm}$ pMOSFETs With $\hbox{Si/Si}_{0.25}\hbox{Ge}_{0.75}/\hbox{Si}$ Channels, High $I_{\rm on}/I_{\rm off}\ (≫ \hbox{5} \times \hbox{10}^{4})$ , and Controlled Short Channel Effects (SCEs)

Se‐Hoon Lee, Prashant Majhi, Jungwoo Oh et al. · IEEE Electron Device Letters · 2008 · 19 citations

Semiconductors, Heterostructure Quantum, Electrical Engineering +12

Effective Modulation of Ni Silicide Schottky Barrier Height Using Chlorine Ion Implantation and Segregation

Wei-Yip Loh, H. Etienne, Brian E. Coss et al. · IEEE Electron Device Letters · 2009 · 16 citations

Materials Engineering, Chlorine Segregates, Ion Implantation +10