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Electrical and Interfacial Characterization of Atomic Layer Deposited High- $\kappa$ Gate Dielectrics on GaAs for Advanced CMOS Devices
137
Citations
25
References
2007
Year
SemiconductorsMaterials ScienceElectrical EngineeringOxide HeterostructuresGate DielectricsEngineeringGaas SubstratesSemiconductor DeviceSemiconductor TechnologyApplied PhysicsP-type GaasSemiconductor MaterialSemiconductor Device FabricationMicroelectronicsAtomic LayerMos CapacitorsCompound SemiconductorInterfacial Characterization
<para xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> In this paper, electrical and interfacial properties of MOS capacitors with atomic layer deposited (ALD) <formula formulatype="inline"><tex>$\hbox{Al}_{2}\hbox{O}_{3}$</tex></formula>, <formula formulatype="inline"><tex>$ \hbox{HfO}_{2}$</tex></formula>, and HfAlO gate dielectrics on sulfur-passivated (S-passivated) GaAs substrates were investigated. HfAlO on p-type GaAs has shown superior electrical properties over <formula formulatype="inline"><tex> $\hbox{Al}_{2}\hbox{O}_{3}$</tex></formula> or <formula formulatype="inline"><tex>$\hbox{HfO}_{2}$</tex></formula> on GaAs, and it is attributed to the reduction of the Ga–O formation at the interfacial layer. HfAlO on p-type GaAs exhibits the best electrical properties after postdeposition annealing (PDA) at 500 <formula formulatype="inline"><tex>$^{\circ}\hbox{C}$</tex></formula>. It is found that PDA, at above 500 <formula formulatype="inline"><tex>$^{\circ}\hbox{C}$</tex></formula>, causes a significant amount of Ga and As out-diffusion into the high-<formula formulatype="inline"><tex>$\kappa$</tex></formula> dielectric, which degrades the interface, as well as bulk high-<formula formulatype="inline"><tex>$\kappa$</tex></formula> properties. </para>
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