C. Prindle

A 7nm FinFET technology featuring EUV patterning and dual strained high mobility channels

Ruijie Xie, P. Montanini, Kerem Akarvardar et al. · 2016 · 144 citations

Engineering, Electrical Engineering, Materials Science +15

High Performance 45-nm SOI Technology with Enhanced Strain, Porous Low-k BEOL, and Immersion Lithography

P. Agnello, T. Ivers, C. Warm et al. · 2006 · 115 citations

Engineering, Computer Engineering, Electrical Engineering +17

A 10nm platform technology for low power and high performance application featuring FINFET devices with multi workfunction gate stack on bulk and SOI

Kwangyou Seo, Bala Haran, Divya Gupta et al. · 2014 · 99 citations

Engineering, Computer Engineering, Electrical Engineering +17

Parasitic Resistance Reduction Strategies for Advanced CMOS FinFETs Beyond 7nm

Heng Wu, Oleg Gluschenkov, Gen Tsutsui et al. · 2018 · 36 citations

Engineering, Electrical Engineering, Electronic Materials +16

Two-dimensional, electrostatic finite element study of tip–substrate interactions in electric force microscopy of high density interconnect structures

T.S. Gross, C. Prindle, Kent Chamberlin et al. · Ultramicroscopy · 2001 · 16 citations

Natural Sciences, Electrical Engineering, Physics +17