Changhyun Kim

A 64-site multishank CMOS low-profile neural stimulating probe

Changhyun Kim, K.D. Wise · IEEE Journal of Solid-State Circuits · 1996 · 104 citations

Stimulation Device, Signal Processing Portion, Medical Electronics +14

A dual-loop delay-locked loop using multiple voltage-controlled delay lines

Yeonjae Jung, Seung-Wook Lee, Daeyun Shim et al. · IEEE Journal of Solid-State Circuits · 2001 · 81 citations

Dual-loop Delay-locked Loop, Electrical Engineering, Time Delay System +12

55 nm capacitor-less 1T DRAM cell transistor with non-overlap structure

Ki‐Whan Song, Hoon Jeong, Jae‐Wook Lee et al. · 2008 · 80 citations

Electrical Engineering, Cell Transistor, Engineering +10

8Gb 3D DDR3 DRAM using through-silicon-via technology

Uksong Kang, Hoeju Chung, Seongmoo Heo et al. · 2009 · 73 citations

Hardware Security, 3D Ic Architecture, Engineering +15

A 2.2 Gbps CMOS look-ahead DFE receiver for multidrop channel with pin-to-pin time skew compensation

Young‐Soo Sohn, Seung-Jun Bae, Hong-June Park et al. · 2004 · 40 citations

Cmos Ladfe, Dfe Input Buffer, Engineering +10