Seung-Jun Bae

An 80 nm 4 Gb/s/pin 32 bit 512 Mb GDDR4 Graphics DRAM With Low Power and Low Noise Data Bus Inversion

Seung-Jun Bae, Kwang‐Il Park, Jeong-Don Ihm et al. · IEEE Journal of Solid-State Circuits · 2008 · 65 citations

Mb Gddr4, Engineering, Vlsi Design +17

A 60nm 6Gb/s/pin GDDR5 Graphics DRAM with Multifaceted Clocking and ISI/SSN-Reduction Techniques

Seung-Jun Bae, Young‐Soo Sohn, Kwang‐Il Park et al. · 2008 · 47 citations

Hardware Security, System On Chip, Multifaceted Clocking +14

23.2 A 5Gb/s/pin 8Gb LPDDR4X SDRAM with power-isolated LVSTL and split-die architecture with 2-die ZQ calibration scheme

Chang‐Kyo Lee, Yoon-Joo Eom, Jin‐Hee Park et al. · 2017 · 44 citations

Low-power Electronics, Hardware Security, Electrical Engineering +15

25.1 A 3.2Gb/s/pin 8Gb 1.0V LPDDR4 SDRAM with integrated ECC engine for sub-1V DRAM core operation

Tae-Young Oh, Hoeju Chung, Young-Chul Cho et al. · 2014 · 40 citations

Lpddr4 Dram, Engineering, Vlsi Design +10

A 2.2 Gbps CMOS look-ahead DFE receiver for multidrop channel with pin-to-pin time skew compensation

Young‐Soo Sohn, Seung-Jun Bae, Hong-June Park et al. · 2004 · 40 citations

Cmos Ladfe, Dfe Input Buffer, Engineering +10