P. Chausse

Active Interposer Technology for Chiplet-Based Advanced 3D System Architectures

P. Coudrain, P. Chausse, L. Arnaud et al. · 2019 · 63 citations

Engineering, Successful Structural Test, Computer Architecture +16

Through Silicon Vias Technology for CMOS Image Sensors Packaging: Presentation of Technology and Electrical Results

David Henry, Jean Charbonnier, P. Chausse et al. · 2008 · 33 citations

Electrical Resistance, Electrical Results, Engineering +18

Development and characterisation of a 3D technology including TSV and Cu pillars for high frequency applications

Jean Charbonnier, R. Hida, David Henry et al. · 2010 · 29 citations

Engineering, Computer-aided Design, Packaging Technologies +16

Polymer filling of medium density through silicon via for 3D-packaging

P. Chausse, Mohamed Khalil Bouchoucha, David Henry et al. · 2009 · 27 citations

Engineering, Test Wafers, Mechanical Engineering +17

Impact of introducing CuSiN self-aligned barriers in advanced copper interconnects

S. Chhun, L.G. Gosset, N. Casanova et al. · Microelectronic Engineering · 2005 · 21 citations

Materials Science, 3D Ic Architecture, Electromigration Technique +8