M. Gerhardt

High performance 65 nm SOI technology with dual stress liner and low capacitance SRAM cell

E. Leobandung, H. Nayakama, D. Mocuta et al. · 2005 · 65 citations

Electrical Engineering, Engineering, Vlsi Design +15

Integration and optimization of embedded-sige, compressive and tensile stressed liner films, and stress memorization in advanced SOI CMOS technologies

L.T. Su, John Pellerin, Shih-Fen Huang et al. · 2005 · 63 citations

Engineering, Vlsi Design, Silicon On Insulator +16

Multiple Stress Memorization In Advanced SOI CMOS Technologies

A. Wei, Maciej Wiatr, A. Mowry et al. · 2007 · 38 citations

Engineering, Vlsi Design, Computer Architecture +16

Self-powered elementary hybrid magnetoelectric sensor

M. Gerhardt, Lukas Zimoch, Christian Dorn et al. · Nano Energy · 2023 · 15 citations

Electrical Engineering, Energy Harvesting, Engineering +5

Process Integration Issues with Spike, Flash and Laser Anneal Implementation for 90 and 65 NM Technologies

T. Feudel, L. Herrmann, M. Herden et al. · 2006 · 10 citations