Woo-Seop Kim

8 Gb 3-D DDR3 DRAM Using Through-Silicon-Via Technology

Uksong Kang, Hoeju Chung, Seongmoo Heo et al. · IEEE Journal of Solid-State Circuits · 2010 · 484 citations

3D Ic Architecture, Electrical Engineering, Engineering +12

55 nm capacitor-less 1T DRAM cell transistor with non-overlap structure

Ki‐Whan Song, Hoon Jeong, Jae‐Wook Lee et al. · 2008 · 80 citations

Electrical Engineering, Cell Transistor, Engineering +10

8Gb 3D DDR3 DRAM using through-silicon-via technology

Uksong Kang, Hoeju Chung, Seongmoo Heo et al. · 2009 · 73 citations

Hardware Security, 3D Ic Architecture, Engineering +15

A 31 ns Random Cycle VCAT-Based 4F$^{2}$ DRAM With Manufacturability and Enhanced Cell Efficiency

Ki‐Whan Song, Jin‐Young Kim, Jae-Man Yoon et al. · IEEE Journal of Solid-State Circuits · 2010 · 33 citations

Enhanced Cell Efficiency, Electrical Engineering, Non-volatile Memory +13

A 40nm 2Gb 7Gb/s/pin GDDR5 SDRAM with a programmable DQ ordering crosstalk equalizer and adjustable clock-tracking BW

Seung-Jun Bae, Young‐Soo Sohn, Tae-Young Oh et al. · 2011 · 32 citations

Hardware Security, System On Chip, Crosstalk Equalizer +15