P.J. Tobin

Fermi-Level Pinning at the Polysilicon/Metal Oxide Interface—Part I

C. C. Hobbs, L. R. C. Fonseca, A. A. Knizhnik et al. · IEEE Transactions on Electron Devices · 2004 · 224 citations

Electrical Engineering, Engineering, Physics +13

The effects of boron penetration on p/sup +/ polysilicon gated PMOS devices

J.R. Pfiester, F.K. Baker, T.C. Mele et al. · IEEE Transactions on Electron Devices · 1990 · 211 citations

Electrical Engineering, Polysilicon Gate, Engineering +13

Fermi-Level Pinning at the Polysilicon/Metal–Oxide Interface—Part II

C. C. Hobbs, L. R. C. Fonseca, A. A. Knizhnik et al. · IEEE Transactions on Electron Devices · 2004 · 174 citations

Materials Science, Electrical Engineering, Semiconductor Device +14

Challenges for the integration of metal gate electrodes

J. Schaeffer, C. Capasso, L. R. C. Fonseca et al. · 2005 · 71 citations

Materials Science, Electrical Engineering, Metal Gate Electrodes +14

Relaxation of strained Si layers grown on SiGe buffers

Srikanth Samavedam, William J. Taylor, J. M. Grant et al. · Journal of Vacuum Science & Technology B Microelectronics and Nanometer Structures Processing Measurement and Phenomena · 1999 · 71 citations

Engineering, Severe Plastic Deformation, Sige Buffers +17