K. Tallman

A 0.25 μm CMOS SOI technology and its application to 4 Mb SRAM

D. Schepis, F. Assaderaghi, D. S. Yee et al. · 2002 · 51 citations

Low-power Electronics, Electrical Engineering, Engineering +10

A 200 mm SiGe-HBT technology for wireless and mixed-signal applications

D.L. Harame, K. Schonenberg, M. Gilbert et al. · 2002 · 32 citations

Engineering, Integrated Circuits, Electromagnetic Compatibility +16

A 200 mm SiGe-HBT BiCMOS technology for mixed signal applications

D. Nguyen-Ngoc, D.L. Harame, J. Malinowski et al. · 2002 · 28 citations

Bicmos Technology, Electrical Engineering, Engineering +13

A high-performance sub-0.25 μm CMOS technology with multiple thresholds and copper interconnects

L.T. Su, R. Schulz, J. Adkisson et al. · 2002 · 26 citations

Low-power Electronics, Electrical Engineering, Engineering +15

Measurement of back end of line thermal resistance for 3D chip stacks

E. G. Colgan, R. Polastre, John Knickerbocker et al. · 2013 · 20 citations

Engineering, Interconnect (Integrated Circuits), Advanced Packaging (Semiconductors) +19