S. P. Klepner

Fabrication Process for Josephson Integrated Circuits

J. H. Greiner, C. J. Kircher, S. P. Klepner et al. · IBM Journal of Research and Development · 1980 · 202 citations

Engineering, Optoelectronic Devices, Integrated Circuits +21

Submicrometer-channel CMOS for low-temperature operation

J.Y.-C. Sun, Yuan Taur, R.H. Dennard et al. · IEEE Transactions on Electron Devices · 1987 · 127 citations

Low-power Electronics, 0.5-µM-channel Cmos Design, Electrical Engineering +11

A 2-ns cycle, 3.8-ns access 512-kb CMOS ECL SRAM with a fully pipelined architecture

T.I. Chappell, B.A. Chappell, S.E. Schuster et al. · IEEE Journal of Solid-State Circuits · 1991 · 122 citations

Pipelined Architecture, Engineering, Vlsi Design +17

Source—Drain contact resistance in CMOS with self-aligned TiSi₂

Yuan Taur, J.Y.-C. Sun, D. Moy et al. · IEEE Transactions on Electron Devices · 1987 · 56 citations

High-reliability Pb-alloy Josephson junctions for integrated circuits

H-C.W. Huang, S. Basavaiah, C. J. Kircher et al. · IEEE Transactions on Electron Devices · 1980 · 54 citations

Engineering, Pb-alloy Josephson Devices, Integrated Circuits +20