Hasan M. Nayfeh - Concepedia

Author

Hasan M. Nayfeh

IBM (United States)ORCID

Also Known As

H. M. Nayfeh, H. Nayfeh, H.M. Nayfeh, Hasan M Nayfeh, Hasan M. Nayfeh, Hasan Nayfeh, Nayfeh, Hasan, Nayfeh, Hasan M.

Publications

2.3K

Citations

H-Index

Concepts

All Affiliations

IBM (United States)Massachusetts Institute of Technology IBM Research - Thomas J. Watson Research Center Advanced Micro Devices (Canada)Georgia Institute of Technology

About

Hasan M. Nayfeh is an author at IBM (United States) specializing in applied physics, electrical engineering, and microelectronics.

Top Concepts

#	Concept	H-Index	Publications	Citations
1	Engineering	12	13	781
2	Applied Physics	12	12	723
3	Computer Engineering	5	5	293
4	Medicine	1	1	22
5	Natural Sciences	1	1	51

Hasan M. Nayfeh

Publications

2.2K

Citations

H-Index

Page 1

	Year	Citations
Evidence for the utility of quantum computing before fault tolerance Young‐Seok Kim, Andrew Eddins, Sajant Anand, Nature	2023	913
Demonstration of quantum volume 64 on a superconducting quantum computing system Petar Jurcevic, Ali Javadi-Abhari, Lev S. Bishop, arXiv (Cornell University)	2020	415
Strained silicon MOSFET technology Judy L. Hoyt, Hasan M. Nayfeh, S. Eguchi, N-type DopantsElectrical EngineeringEngineeringPhysicsNanoelectronics	2003	245
High performance 14nm SOI FinFET CMOS technology with 0.0174&#x00B5;m<sup>2</sup> embedded DRAM and 15 levels of Cu metallization C-H. Lin, B. Greene, J. Cai,	2014	128
High Performance 45-nm SOI Technology with Enhanced Strain, Porous Low-k BEOL, and Immersion Lithography P. Agnello, T. Ivers, C. Warm, EngineeringVlsi DesignEnhanced StrainPorous Low-k BeolIntegrated Circuits	2006	115
A Physically Based Analytical Model for the Threshold Voltage of Strained-Si n-MOSFETs Hasan M. Nayfeh, Judy L. Hoyt, D.A. Antoniadis IEEE Transactions on Electron Devices Device ModelingStrained-si N-mosfetsElectrical EngineeringEngineeringChannel Doping	2004	80
Influence of high channel doping on the inversion layer electron mobility in strained silicon n-MOSFETs Hasan M. Nayfeh, C. W. Leitz, Arthur J. Pitera, IEEE Electron Device Letters Electrical EngineeringEngineeringStrained Silicon N-mosfetsPhysicsStrained Si Devices	2003	62
A 7nm CMOS technology platform for mobile and high performance compute application B. Jagannathan, Akihisa Ogino, D. Jaeger, EngineeringVlsi DesignComputer ArchitectureIntegrated CircuitsHardware Systems	2017	58
High performance 65 nm SOI technology with enhanced transistor strain and advanced-low-K BEOL W.-H. Lee, Anya M. Waite, H. Nii, EngineeringVlsi DesignIntegrated CircuitsSilicon On InsulatorHigh Performance 65	2006	55
Demonstration of quantum volume 64 on a superconducting quantum computing system Petar Jurcevic, Ali Javadi-Abhari, Lev S. Bishop, Quantum Science and Technology Quantum SoftwareQuantum System SoftwareEngineeringComputer ArchitectureHardware Stack	2021	51

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