Jian‐Hsing Lee - Concepedia

Author

Jian‐Hsing Lee

GlobalFoundries (United States)ORCID

Also Known As

Boon-Khim Liew Yue, Chih-Cherng Liao, Jian-Hsing Lee, Jian-hsing Lee, Jian‐Hsing Lee

109

Publications

544

Citations

H-Index

Concepts

All Affiliations

GlobalFoundries (United States)Taiwan Semiconductor Manufacturing Company (Taiwan)Richtek Technology (Taiwan)National Tsing Hua University National Cheng Kung University

About

Jian‐Hsing Lee is an author at GlobalFoundries (United States) specializing in engineering, electrical engineering, and microelectronics.

Top Concepts

#	Concept	H-Index	Publications	Citations
1	Engineering	13	16	291
2	Electrical Engineering	13	16	291
3	Applied Physics	6	6	129
4	Computer Engineering	6	6	124
5	Biomedical Engineering	1	1	16

Jian‐Hsing Lee

Publications

333

Citations

H-Index

Page 1

	Year	Citations
The influence of the layout on the ESD performance of HV-LDMOS Jian‐Hsing Lee, Hung‐Der Su, Chien-Ling Chan, International Symposium on Power Semiconductor Devices and IC's Electrical EngineeringPhysical Design (Electronics)EngineeringVlsi DesignHigh Voltage Engineering	2010	28
The Influence of NBL Layout and LOCOS Space on Component ESD and System Level ESD for HV-LDMOS Jian‐Hsing Lee, S.H. Chen, Yu‐Ting Tsai, Electrical EngineeringEngineeringApplied PhysicsComputer EngineeringNbl Layout	2007	27
A Simple and Useful Layout Scheme to Achieve Uniform Current Distribution for Multi-Finger Silicided Grounded-Gate NMOS Jian‐Hsing Lee, Yi-Hsun Wu, Chin-Hsin Tang, Contact SpacingElectrical EngineeringPhysical Design (Electronics)EngineeringVlsi Design	2007	25
Dynamic Turn-On Mechanism of the n-MOSFET Under High-Current Stress Dao-Hong Yang, Jone F. Chen, Jian‐Hsing Lee, IEEE Electron Device Letters Dynamic Turn-on MechanismElectrical EngineeringEngineeringNanoelectronicsVoltage Measurement	2008	22
The Dynamic Current Distribution of a Multi-Fingered GGNMOS Under High Current Stress and HBMESD Events Jian‐Hsing Lee, Kuo-Ming Wu, Shao-chang Huang, Electrical EngineeringHigh Current StressDirect Substrate PotentialEngineeringPhysics	2006	19
A Novel Drain Design for ESD Improvement of UHV-LDMOS C Wu, Jian‐Hsing Lee, Chenhsin Lien IEEE Transactions on Electron Devices Low-power ElectronicsDevice ModelingElectrical EngineeringHuman Body ModelEngineering	2015	19
The ESD failure mechanism of ultra-HV 700V LDMOS Jian‐Hsing Lee, Tzu‐Cheng Kao, Chien-Liang Chan, Esd Failure MechanismElectrical EngineeringEngineeringElectrostatic DischargeTime-dependent Dielectric Breakdown	2011	19
New analytical equations for skin and proximity effects in interconnects operated at high frequency Haojun Zhang, Jian‐Hsing Lee, Natarajan Mahadeva Iyer, Operating FrequencyEngineeringNew Analytical EquationsHigh FrequencyInterconnect (Integrated Circuits)	2017	17
Incorporation of a Simple ESD Circuit in a 650V E-Mode GaN HEMT for All-Terminal ESD Protection Jian‐Hsing Lee, Yeh-Jen Huang, Li-Yang Hong, 2022 IEEE International Reliability Physics Symposium (IRPS) Electrical EngineeringEngineeringHigh Voltage EngineeringPower DeviceE-mode Hemt	2022	17
The positive trigger voltage lowering effect for latch-up Jian‐Hsing Lee, Wu‐Te Weng, Jiaw‐Ren Shih, Low-power ElectronicsElectrical EngineeringEngineeringTrigger VoltagePositive Trigger Point	2004	16

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