Pak Sing Leung

A 0.13 μm CMOS platform with Cu/low-k interconnects for system on chip applications

T. Schiml, S. Biesemans, G. Brase et al. · 2002 · 53 citations

Low-power Electronics, Electrical Engineering, Engineering +14

High performance 50 nm CMOS devices for microprocessor and embedded processor core applications

Shih-Fen Huang, Chih‐Yung Lin, Yu-Shyang Huang et al. · 2002 · 40 citations

Processor Core Applications, Engineering, Vlsi Design +16

Wavelet transform-based stress-time history editing of horizontal axis wind turbine blades

Panu Pratumnopharat, Pak Sing Leung, Richard Court · Renewable Energy · 2013 · 38 citations

Engineering, Wind Power Generation, Wind Turbine Blades +5

Conduction Mechanisms of Ta/Porous SiCOH Films under Electrical Bias

Ya Ou, Pei‐I Wang, Ming He et al. · Journal of The Electrochemical Society · 2008 · 28 citations

Materials Engineering, Materials Science, Electrical Engineering +14

Integration of high-performance, low-leakage and mixed signal features into a 100 nm CMOS technology

T. Schafbauer, J. Brighten, Yi-Cheng Chen et al. · 2003 · 22 citations

Low-power Electronics, Electrical Engineering, Engineering +14