C. Schiller

A 7nm CMOS technology platform for mobile and high performance compute application

B. Jagannathan, Akihisa Ogino, D. Jaeger et al. · 2017 · 60 citations

Engineering, Computer Engineering, Electrical Engineering +14

A 0.25 μm CMOS SOI technology and its application to 4 Mb SRAM

D. Schepis, F. Assaderaghi, D. S. Yee et al. · 2002 · 51 citations

Engineering, Computer Engineering, Electrical Engineering +12

Scaling of 32nm low power SRAM with high-K metal gate

Haining Yang, Robert Wong, R. Hasumi et al. · 2008 · 50 citations

Engineering, Computer Engineering, Electrical Engineering +16

A 4-GHz 8-b ADC system

C. Schiller, P. F. Byrne · IEEE Journal of Solid-State Circuits · 1991 · 29 citations

Engineering, Computer Engineering, Electrical Engineering +17

Case studies of fault isolation for the global failing patterns on SRAM bitmap caused by the defects in peripheral logic regions

Jianhua Yin, Jian Yu, Sheng Quan Xie et al. · 2013 · 12 citations

Engineering, Computer Engineering, Electrical Engineering +15