N. Breil

High performance 14nm SOI FinFET CMOS technology with 0.0174µm ² embedded DRAM and 15 levels of Cu metallization

C-H. Lin, B. Greene, J. Cai et al. · 2014 · 129 citations

Engineering, Computer Engineering, Electrical Engineering +9

Comparative Analysis of Semiconductor Device Architectures for 5-nm Node and Beyond

Peijie Feng, Seung-Chul Song, Giri Nallapati et al. · IEEE Electron Device Letters · 2017 · 50 citations

Engineering, Computer Engineering, Electrical Engineering +17

An 8-bit 20.7 TOPS/W Multi-Level Cell ReRAM-based Compute Engine

Justin M. Correll, Jie Lu, Seungheun Song et al. · 2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits) · 2022 · 47 citations

Engineering, Computer Engineering, Computer Science +11

Low Temperature Implementation of Dopant-Segregated Band-edge Metallic S/D junctions in Thin-Body SOI p-MOSFETs

Guilhem Larrieu, Emmanuel Dubois, Romain Valentin et al. · 2007 · 46 citations

Engineering, Electrical Engineering, Materials Science +17

Optimization of RF Performance of Metallic Source/Drain SOI MOSFETs Using Dopant Segregation at the Schottky Interface

Romain Valentin, Emmanuel Dubois, Guilhem Larrieu et al. · IEEE Electron Device Letters · 2009 · 26 citations · Full text

Engineering, Electrical Engineering, Materials Science +17