L.W. Schaper - Concepedia

Author

L.W. Schaper

University of Arkansas at Fayetteville

Also Known As

L. Schaper, L. W. Schaper, L.W. Schaper, Leonard Schaper, Leonard W. Schaper

Publications

914

Citations

H-Index

Concepts

All Affiliations

University of Arkansas at Fayetteville University of Alabama

About

L.W. Schaper is an author at University of Arkansas at Fayetteville specializing in engineering, microelectronics, and electronic packaging.

Top Concepts

#	Concept	H-Index	Publications	Citations
1	Engineering	18	26	734
2	Electrical Engineering	16	20	581
3	Computer Engineering	10	11	272
4	Applied Physics	9	9	249
5	Computer Science	1	1	31

L.W. Schaper

Publications

746

Citations

H-Index

Page 1

	Year	Citations
Process integration for through-silicon vias S. Spiesshoefer, Zia Ur Rahman, G. Vangara, Journal of Vacuum Science & Technology A Vacuum Surfaces and Films Process IntegrationEngineeringDevice IntegrationIntegrated CircuitsInterconnect (Integrated Circuits)	2005	77
Architectural implications and process development of 3-D VLSI Z-axis interconnects using through silicon vias L.W. Schaper, S. L. Burkett, S. Spiesshoefer, IEEE Transactions on Advanced Packaging EngineeringSilicon ViasProcess DevelopmentComputer ArchitectureTsv Requirements	2005	65
Reliability study of through-silicon via (TSV) copper filled interconnects A. Kamto, Y. Liu, L.W. Schaper, Thin Solid Films ReliabilityElectrical EngineeringReliability StudyEngineeringHardware Reliability	2009	48
A preliminary investigation of the effect of post-deposition polishing of diamond films on the machining behavior of diamond-coated cutting tools Deepak Bhat, D.G. Johnson, Ajay P. Malshe, Diamond and Related Materials Materials SciencePost-deposition PolishingEngineeringMaterial ProcessingCorrosion	1995	45
Control of sidewall slope in silicon vias using SF6∕O2 plasma etching in a conventional reactive ion etching tool R. F. Figueroa, S. Spiesshoefer, S. L. Burkett, Journal of Vacuum Science & Technology B Microelectronics and Nanometer Structures Processing Measurement and Phenomena EngineeringSilicon ViasIntegrated CircuitsSilicon On InsulatorPlasma Processing	2005	45
Z-axis interconnects using fine pitch, nanoscale through-silicon vias: Process development S. Spiesshoefer, L.W. Schaper, S. L. Burkett, EngineeringComputer ArchitectureFine PitchMultichip SystemsInterconnect (Integrated Circuits)	2004	42
IC stacking technology using fine pitch, nanoscale through silicon vias S. Spiesshoefer, L.W. Schaper 3D Ic ArchitectureWafer Scale ProcessingEngineeringAdvanced Packaging (Semiconductors)Microfabrication	2004	32
Effect of process parameters on via formation in Si using deep reactive ion etching I. U. Abhulimen, S. Polamreddy, S. L. Burkett, Journal of Vacuum Science & Technology B Microelectronics and Nanometer Structures Processing Measurement and Phenomena EngineeringModified Bosch ProcessIntegrated CircuitsSilicon On InsulatorInterconnect (Integrated Circuits)	2007	32
Design of multichip modules L.W. Schaper Proceedings of the IEEE EngineeringMultichip ModuleComputer ArchitectureSystem-level DesignEmbedded Systems	1992	31
Fabrication and testing of through-silicon vias used in three-dimensional integration I. U. Abhulimen, A. Kamto, Y. Liu, Journal of Vacuum Science & Technology B Microelectronics and Nanometer Structures Processing Measurement and Phenomena EngineeringIntegrated CircuitsSilicon On InsulatorInterconnect (Integrated Circuits)Wafer Scale Processing	2008	28

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