S. Spiesshoefer

Process integration for through-silicon vias

S. Spiesshoefer, Zia Ur Rahman, G. Vangara et al. · Journal of Vacuum Science & Technology A Vacuum Surfaces and Films · 2005 · 77 citations

Process Integration, Engineering, Device Integration +19

Architectural implications and process development of 3-D VLSI Z-axis interconnects using through silicon vias

L.W. Schaper, S. L. Burkett, S. Spiesshoefer et al. · IEEE Transactions on Advanced Packaging · 2005 · 65 citations

Engineering, Silicon Vias, Process Development +21

Control of sidewall slope in silicon vias using SF6∕O2 plasma etching in a conventional reactive ion etching tool

R. F. Figueroa, S. Spiesshoefer, S. L. Burkett et al. · Journal of Vacuum Science & Technology B Microelectronics and Nanometer Structures Processing Measurement and Phenomena · 2005 · 45 citations

Engineering, Silicon Vias, Integrated Circuits +17

Z-axis interconnects using fine pitch, nanoscale through-silicon vias: Process development

S. Spiesshoefer, L.W. Schaper, S. L. Burkett et al. · 2004 · 42 citations

Engineering, Computer Architecture, Fine Pitch +19

IC stacking technology using fine pitch, nanoscale through silicon vias

S. Spiesshoefer, L.W. Schaper · 2004 · 32 citations

3D Ic Architecture, Wafer Scale Processing, Engineering +10