Halo-Doped Hetero Dielectric Nanowire MOSFET Scaled to the Sub-10 nm Node

Improved Subthreshold and Output Characteristics of Source-Pocket Si Tunnel FET by the Application of Laser Annealing

Hsu-Yu Chang, Bruce Adams, Po-Yen Chien et al. · IEEE Transactions on Electron Devices · 2012 · 153 citations

Engineering, Electrical Engineering, Microelectronics +15

Insight Into Gate-Induced Drain Leakage in Silicon Nanowire Transistors

Jiewen Fan, Ming Li, Xiaoyan Xu et al. · IEEE Transactions on Electron Devices · 2014 · 152 citations

Engineering, Electrical Engineering, Microelectronics +16

Quantum-mechanical effects in trigate SOI MOSFETs

J.-P. Colinge, J. Alderman, Weize Xiong et al. · IEEE Transactions on Electron Devices · 2006 · 132 citations

Engineering, Electrical Engineering, Materials Science +17

Insight into Lateral Band-to-Band-Tunneling in Nanowire Junctionless FETs

Shubham Sahay, M. Jagadesh Kumar · IEEE Transactions on Electron Devices · 2016 · 117 citations

Engineering, Electrical Engineering, Physics +17

Controlling L-BTBT and Volume Depletion in Nanowire JLFETs Using Core–Shell Architecture

Shubham Sahay, M. Jagadesh Kumar · IEEE Transactions on Electron Devices · 2016 · 102 citations

Engineering, Electrical Engineering, Materials Science +17