B. Balaji

Performance analysis of sub 10 nm regime source halo symmetric and asymmetric nanowire MOSFET with underlap engineering

Padakanti Kiran Kumar, B. Balaji, K. Srinivasa Rao · Silicon · 2022 · 24 citations

Electrical Engineering, Engineering, Performance Analysis +4

Improved Drain Current Characteristics of HfO2/SiO2 Dual Material Dual Gate Extension on Drain Side-TFET

B. Balaji, K. Srinivasa Rao, K. Girija Sravani et al. · Silicon · 2022 · 24 citations

Electrical Engineering, Engineering, Nanoelectronics +7

An intensive approach to optimize capacitive type RF MEMS shunt switch

P. Ashok Kumar, K. Srinivasa Rao, K. Girija Sravani et al. · Microelectronics Journal · 2021 · 18 citations

Design and Performance Analysis of High-k Gate All Around Fin-field Effect Transistor

K. Rohith Sai, K. Girija Sravani, K. Srinivasa Rao et al. · International Journal of Engineering · 2023 · 17 citations · Full text

Device Modeling, Symmetrical Design, Electrical Engineering +12

Design and Performance Evaluation of 6nm HEMT with Silicon Sapphire Substrate

Y. Gowthami, B. Balaji, K. Srinivasa Rao · Silicon · 2022 · 15 citations

Materials Engineering, Electrical Engineering, Engineering +9