Schottky Source LDMOS - Electrical SOA Improvement through BJT Suppression

Abstract

This paper introduces the first application of a Schottky source approach for the purpose of expanding the Electrical Safe Operating Area (E-SOA) of a HV Transistor. Replacing the conventional PN source with a Schottky source suppresses the parasitic BJT enabling significant improvement in the E-SOA, particularly for very fast pulses. Under these conditions, improvement in the trigger voltage and current of a 40V n-LDMOS is 5.6% and 117% respectively. The breakdown voltage of 57V is maintained and a competitive on-resistance of 31.5 mOhm.mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> achieved.