An industry-ready 200 mm p-GaN E-mode GaN-on-Si power technology

Abstract

Enhancement mode 650V rated p-GaN gate HEMTs are fabricated on 200 mm p <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">+</sup> Si substrates by using an industrial, Au-free process. The devices show true e-mode performance, with a high V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">t</sub> of 2.8 V, low off-state leakage current and are dynamic R <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">DS-ON</sub> free over the complete V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">DS</sub> and temperature range. High temperature reverse bias (HTRB) testing is done on-wafer and after packaging. For the first time, 650 V e-mode power HEMTs realized on 200 mm Si substrates, show industry ready device performance and pass 1008 hour reliability testing, at V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">GS</sub> =0 V, V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">DS</sub> =650 V.