2016 · 14 citations · 4 references
EngineeringComputer EngineeringElectrical EngineeringLow-power DesignMicroelectronicsSemiconductor DevicesCmos Circuit DesignComplementary Metal-oxide-semiconductor TechnologyDevice CharacterizationIntegrated Circuit DesignLow-noise Circuit DesignShort-channel EffectsBody EffectFin Field-effect TransistorsFlickerFlicker NoiseJunction CapacitanceLeakagePower-efficient DesignTelecommunication Infrastructure
Due to increasing bandwidth demand in data centers and telecommunication infrastructures, the maximum data-rate of wireline transceivers is projected to double from 32Gb/s to 64Gb/s while keeping the same power envelope. This paper presents the design of a 64Gb/s NRZ transmitter for short-reach electrical links in a 16nm FinFET process. It is applicable to standards such as CEI-56-VSR/MR, using power efficient techniques that take into considerations FinFET device properties: low DIBL, negligible body effect, low junction capacitance, low channel leakage, high intrinsic gain, high gate capacitance and resistance, high flicker noise, and steep CV curve in accumulation region.
4
A 1.0625 Gbps transceiver with 2x-oversampling and transmit signal pre-emphasis
A. Fiedler, R. Mactaggart, J. Welch et al. · 2002 · 98 citations
2.3 60Gb/s NRZ and PAM4 transmitters for 400GbE in 65nm CMOS
Ping-Chuan Chiang, Hao-Wei Hung, Hsiang-Yun Chu et al. · 2014 · 46 citations
Engineering, Computer Engineering, Electrical Engineering +16
3.3 A 0.5-to-32.75Gb/s flexible-reach wireline transceiver in 20nm CMOS
Parag Upadhyaya, Jafar Savoj, Fu-Tai An et al. · 2015 · 39 citations
Engineering, Computer Engineering, Electrical Engineering +15