A novel voltage clamp circuit for the measurement of transistor dynamic on-resistance

Abstract

For determining the dynamic on-resistance R <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">dyn,on</sub> of a power transistor, the voltage and current waveforms have to be measured during the switching operation. In measurements of voltage waveforms, using an oscilloscope, the characteristics of an amplifier inside the oscilloscope are distorted when the range of the measurement channel is not set wide enough to measure both on-state and off-state voltage, resulting in failure to accurately measure the voltage waveforms. A novel voltage clamp circuit improving the accuracy of the transistor on-state voltage measurement is presented. The measurement accuracy is improved by clamping the off-state voltage across the transistor to a lower voltage that is still greater than the on-state voltage. Unlike traditional clamping circuit, the presented voltage clamp circuit does not introduce delay caused by RC time constants keeping the voltage waveform clear even during state transitions of the evaluated semiconductor device for frequencies up to 1MHz.