Publication | Closed Access
Impact of Technology Scaling in sub-100 nm nMOSFETs on Total-Dose Radiation Response and Hot-Carrier Reliability
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Citations
21
References
2014
Year
Electrical EngineeringEngineeringSub-100 Nm NmosfetsRf SemiconductorTechnology ScalingNanoelectronics32-Nm Nfets ExhibitBias Temperature InstabilityApplied PhysicsTime-dependent Dielectric Breakdown32-Nm NfetsDevice ReliabilityMicroelectronicsBeyond CmosHot-carrier ReliabilityElectron TrappingSemiconductor Device
The total-dose radiation tolerance of 32-nm nFETs is investigated. nFETs built in 32-nm RF-CMOS-on-SOI technology with high-k dielectrics show increased off-state leakage current and electron trapping in the gate oxide. The impact of CMOS-on-SOI technology scaling (from 65-nm to 32-nm) on the total-dose radiation tolerance and hot-carrier reliability (HCR) is investigated through both experiments and supporting TCAD simulations. The 32-nm nFETs exhibit less total-dose degradation compared to 45-nm nFETs. However, the hot-carrier degradation increases as the technology scales. An interplay of electric-field in the gate oxide and impact ionization in the channel region is responsible for the observed differences in the degradation mechanisms for the three technologies.
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