Prediction of Logic Product Failure Due To Thin-Gate Oxide Breakdown

Abstract

Gate oxide breakdown is a key mechanism limiting IC lifetime. Breakdown is typically characterized on test capacitors, but estimating product reliability from such results requires making a number of often-untested assumptions. This work compares the predictions of capacitor-based models to results from accelerated lifetest of logic CPU products. For the technology studied, lifetest failure rate was somewhat lower than model prediction, and failure analysis indicated that an important factor was the different sensitivities of logic circuits vs. cache cells and of n and p transistors in the cache. Analysis of the factors involved in determining oxide-breakdown reliability and of the statistical uncertainties in capacitor-based models indicates that it is important to calibrate models to product data including these effects. Once a model is validated, the paper discusses how it can be used to assess the reliability impact of changes in processing, use conditions, and circuit design