Concepedia

A methodology for the identification of worst-case test vectors for logical faults induced in CMOS circuits by total dose

Ahmed A. Abou-Auf, D. F. Barbe, Harvey Eisen

IEEE Transactions on Nuclear Science · 1994 · 13 citations · 5 references

Open access

Abstract

A new methodology was developed for the identification of the worst-case combination of irradiation and postirradiation test vectors. The methodology significantly simplifies total-dose testing of CMOS VLSI devices. It also provides more accurate assessment of failure levels for such devices.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">></ETX>

References

5

Digital Systems : Testing and Testable Design

European Journal of Operational Research · 1990 · 1.5K citations

Engineering, Computer Engineering, Systems Engineering +14

SWITCHING RESPONSE OF COMPLEMENTARY SYMMETRY MOS TRANSISTOR LOGIC CIRCUITS

Joseph R. Burns · 1964 · 113 citations

Engineering, Computer Engineering, Electrical Engineering +10

Radiation Failure Modes in CMOS Integrated Circuits

R. A. Burghard, C. W. Gwyn · IEEE Transactions on Nuclear Science · 1973 · 27 citations

Engineering, Computer Engineering, Electrical Engineering +17

Simulation of Worst-Case Total Dose Radiation Effects in CMOS VLSI Circuits

B. L. Bhuva, J.J. Paulos, S. E. Diehl · IEEE Transactions on Nuclear Science · 1986 · 18 citations

Engineering, Computer Engineering, Electrical Engineering +17

Switch-level simulation of total dose effects on CMOS VLSI circuits

B. L. Bhuva, J.J. Paulos, R.S. Gyurcsik et al. · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 1989 · 18 citations

Engineering, Computer Engineering, Electrical Engineering +17